This invention relates to fabrication techniques for vertically structured semiconductor devices and, in particular, to a recessed structure which requires relatively simple fabrication techniques.
One example of a vertically structured semiconductor device is a static induction transistor (SIT) which is a field effect semiconductor device capable of operation at relatively high frequency and power. These transistors generally have a short, high resistivity semiconductor channel which may be controllably depleted of carriers. The current-voltage characteristics of the static induction transistor are generally similar to those of a vacuum tube triode. The devices are described by Nishizawa et al in U.S. Pat. No. 3,828,230 issued Aug. 6, 1974 and in U.S. Pat. No. 4,199,771 issued May 22, 1980.
The static induction transistor generally uses a vertical geometry with source and drain electrodes placed on opposite sides of a thin, high-resistivity layer of one conductivity type. Gate regions of the opposite conductivity type are positioned in the high resistivity layer on opposite sides of the source. During operation a reverse bias is applied between the gate region and the remainder of the high resistivity layer causing a depletion region to extend into the channel below the source. As the magnitude of the reverse bias voltage is varied, the source-drain current and voltage derived from an attached energy source will also vary.
The design and fabrication of the gate-source structure of vertical-geometry static induction transistors is difficult. In order to operate at high frequencies and low voltages, such devices must be built under extremely tight dimensional control. Involved dimensions are in the micrometer range, requiring photolithographic alignments with submicrometer precision. Many photolithographic steps are required to define the device, with unnecessary steps being used to define the source area after definition of the gate area. Similar considerations must be taken into account in fabricating other vertically structured devices.
A large diversity of prior art exists in fabrication of vertical structures for semiconductor devices. The structure of a static induction transistor, in particular, has been accomplished by means including anisotropic etching, epitaxial regrowth, and controlled impurity diffusion. A common characteristic of these prior methods of fabricating vertically structured semiconductor devices is that contact or source impurity material is applied to the surface of the semiconductor material after the gate regions are defined. Copending U.S. patent application No., entitled "High Frequency Static Induction Transistor," invented by Adrian I. Cogan and assigned to the same assignee as this application, discloses an alternate method for applying source impurity material prior to gate impurity material in fabricating a static induction transistor.